Term of the Moment
connected camera
Redirected from: chip pathway
Definition: via
(1) By means of, by way of. From Latin for "way" or "path."
(2) (Virtual Interface Architecture) See VI.
(3) For Intel's chip power and interconnect separation architecture, see PowerVia.
(4) (Vertical Interconnect Access) In a printed circuit board, a conducting pathway between layers. The via is created by drilling a hole through the board where the layers interconnect. Copper fills the hole entirely or coats only the sides of the hole. See printed circuit board.
(5) (Vertical Interconnect Access) In a 3D chip, a conducting pathway between layers. Two or more stacked die are connected by "through-silicon vias" (TSVs), which are pathways that pass completely through the die.
TSV Pathways Between 3D Chips
Creating Vias on Programmable Chips
(2) (Virtual Interface Architecture) See VI.
(3) For Intel's chip power and interconnect separation architecture, see PowerVia.
(4) (Vertical Interconnect Access) In a printed circuit board, a conducting pathway between layers. The via is created by drilling a hole through the board where the layers interconnect. Copper fills the hole entirely or coats only the sides of the hole. See printed circuit board.
(5) (Vertical Interconnect Access) In a 3D chip, a conducting pathway between layers. Two or more stacked die are connected by "through-silicon vias" (TSVs), which are pathways that pass completely through the die.
The vertical blue lines are the insulated through-silicon vias (TSVs) between two chips on the same package. See system in package.
In the antifuse programmable chip technology, a circuit is closed by turning non-conductive silicon into a conductive via. See antifuse.