(
Intel
Architecture
-64) The 64-bit architecture used in Intel's now-legacy Itanium family of CPU chips. The Itanium line was launched in 2001 and discontinued in 2021. Engineered for server processing, IA-64 was designed when millions of transistors on a chip were commonplace, which was two decades after Intel developed its first x86 CPUs. See
Itanium and
x86-64.
Recompilation Required
Although applications written for x86 and HP 9000 computers run intact on IA-64 via translation (see
IA-32 Execution Layer), programs must be recompiled to take full advantage of the architecture.
Rather than variable-length instructions as in x86 (IA-32), IA-64 uses fixed-length, four-byte instructions bundled in sets of three "long instruction words." IA-64 uses 256 registers for integer and floating point operations compared to 16 in IA-32.
IA-64 Predicts the Future
Taking advantage of an advanced pipeline architecture, IA-64 employs "predication." Both sides of a branch instruction following a compare are executed in parallel. After determining which branch is correct, the results of the other are discarded. Compilers have to set up the predication by interleaving instructions and adding codes to tell the CPU how to execute in parallel. If not set up, the CPU makes a simple prediction, and wrong guesses waste a few nanoseconds.
IA-64 also supports speculative loading, which loads data into registers before the instructions actually need to process it. Intel brands this parallel architecture as "Explicitly Parallel Instruction Computing" (EPIC).