A high-speed interconnect between integrated circuits from the HyperTransport Consortium. Introduced in 2001, code-named Lightning Data Transport and developed by AMD and others, the HyperTransport I/O Link Specification defines a protocol and electrical interface between the CPU, memory and peripheral devices.
Since its introduction, HyperTransport's maximum aggregate bandwidth of 32-bit links progressed from 12.8 to 51.2 Gbytes/sec. Version 3.0 added dynamic link splitting under software control. Called "Un-Ganging," it enables a single unidirectional link to be split into two; each at half the original bit width. HyperTransport was designed to be fully compatible with legacy PCI (running at 33 or 66 MHz) plus PCI Express and PCI-X technologies.
Clock Band
Speed Width Hot Un-
Version (MHz) (GB/s) Swap Ganging
HT 1.0 (2001) 800 12.8 no no
HT 1.1 (2002) 800 12.8 no no
HT 2.0 (2004) 1400 22.4 no no
HT 3.0 (2006) 2600 41.6 yes yes
HT 3.1 (2008) 3200 51.2 yes yes